Install
$ agentstack add skill-mohitmishra786-low-level-dev-skills-spi-i2c-baremetal ✓ scanned · ✓ verified, works with Claude Code, Cursor, and more.
Security review
✓ PassedNo issues found. Passed automated security review. · v0.1.0 How review works →
- ✓ Prompt-injection patterns
- ✓ Secret / credential exfiltration
- ✓ Dangerous shell & filesystem operations
- ✓ Untrusted network calls
- ✓ Known-malicious package signatures
What it can access
- ✓ Network access No
- ✓ Filesystem access No
- ✓ Shell / process execution No
- ✓ Environment & secrets No
- ✓ Dynamic code execution No
From automated source analysis of v0.1.0. “Used” means the capability is present in the source — more access means more to trust, not that it’s unsafe.
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Passed review? Show it. Paste this badge into your README, it links to the public security report.
Reliability & compatibility
Declared compatibility
Compatibility is declared by the source manifest. End-to-end runtime verification is coming, see below.
We're building live execution health for every listing: tool-call success rate, median latency, uptime, and last-checked timestamps, measured, not self-reported. It isn't live yet, so we don't show numbers we can't stand behind.
How agent discovery & health will work →About
SPI and I2C (Bare-Metal)
Purpose
Implement SPI and I2C master drivers for sensor and memory chips: clock configuration, phase/polarity (SPI), START/ACK sequences (I2C), and common register-oriented transaction patterns.
When to Use
- Reading an I2C sensor (WHOAMI register)
- SPI flash or display bring-up
- Debugging NACK or stuck SCL
- Replacing HAL_I2C/SPI with minimal code
Workflow
1. SPI master (STM32)
/* Mode 0: CPOL=0, CPHA=0 — check slave datasheet */
SPI1->CR1 = SPI_CR1_MSTR | SPI_CR1_SSM | SPI_CR1_SSI
| (3 CR1 |= SPI_CR1_SPE;
uint8_t spi_xfer(SPI_TypeDef *spi, uint8_t tx) {
while (!(spi->SR & SPI_SR_TXE))
;
*(volatile uint8_t *)&spi->DR = tx;
while (!(spi->SR & SPI_SR_RXNE))
;
return *(volatile uint8_t *)&spi->DR;
}
CS (GPIO bit-bang):
GPIO_CS_LOW();
spi_xfer(SPI1, reg | 0x80); /* read */
uint8_t val = spi_xfer(SPI1, 0xFF);
GPIO_CS_HIGH();
2. I2C master — register read
/* START → addr+W → reg → repeated START → addr+R → data → STOP */
bool i2c_read_reg(I2C_TypeDef *i2c, uint8_t dev7, uint8_t reg, uint8_t *out) {
if (!i2c_start(i2c)) return false;
if (!i2c_tx(i2c, (dev7 << 1) | 0)) return false;
if (!i2c_tx(i2c, reg)) return false;
if (!i2c_restart(i2c)) return false;
if (!i2c_tx(i2c, (dev7 << 1) | 1)) return false;
*out = i2c_rx(i2c, false); /* NACK last byte */
i2c_stop(i2c);
return true;
}
Poll SB, ADDR, TXE, RXNE, BTF per reference manual.
3. Common protocols
| Pattern | Bus | |---------|-----| | reg + write data | I2C/SPI | | 0x80|reg read (MSB set) | SPI sensors | | 16-bit big-endian length prefix | SPI flash |
4. Agent usage
/spi-i2c-baremetal I2C read of register 0x0F from device 0x68
Common Problems
| Symptom | Cause | Fix | |---------|-------|-----| | I2C NACK | Wrong 7-bit addr (8-bit in datasheet) | Shift addr; check R/W bit | | SPI garbage | CPOL/CPHA mismatch | Match slave mode table | | Bus stuck SCL low | Slave clock stretch / fault | Bus recovery (clock pulses) | | CS glitch | CS timing vs clock | Assert CS before first SCK |
Related Skills
skills/baremetal/gpio-baremetal— CS, SDA, SCL pinsskills/baremetal/peripherals-from-datasheet— timing requirementsskills/kernel-dev/bus-drivers-i2c-spi— Linux kernel side
Source & license
This open-source skill is cataloged on AgentStack and links to its original source — we do not rehost the code.
- Author: mohitmishra786
- Source: mohitmishra786/low-level-dev-skills
- License: MIT
- Homepage: https://www.lowleveldevskills.com
Install and usage instructions live in the source repository linked above.
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Versions
- v0.1.0 Imported from the upstream source.