Dfmea Design

Design FMEA (DFMEA) — AIAG-VDA 2019

Goal

Identify and mitigate design risks by analysing functions, interfaces, and failure modes — so that design weaknesses are resolved before release to manufacturing, and the results feed directly into the DVP, PFMEA, and Control Plan.

Required Execution Checklist

• [ ] DFMEA scope defined: boundary diagram complete, inside/outside boundary identified
• [ ] Product hierarchy mapped: system → subsystem → component → interface (Step 2)
• [ ] All interfaces identified — internal (component-to-component), external (environment), and user/assembly
• [ ] All functions defined with Verb + Noun + Measurable Standard (Step 3)
• [ ] Each function has a measurable verification method confirmed in the DVP
• [ ] Failure chain complete: Effect → Mode → Cause for each function (Step 4)
• [ ] All Failure Causes validated using engineering analysis (FEA, calculation) or test evidence — not assumptions
• [ ] S/O/D ratings justified using analysis, test data, or design history
• [ ] All H-AP items have a defined action, named owner, and target date
• [ ] DFMEA → DVP, PFMEA, and drawing linkage verified before release to manufacturing

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When to use

• New product development (integrate into APQP Phase 2 — Product Design and Development)
• Design change or engineering change request (ECR)
• Field failure investigation revealing a design root cause
• Periodic design review
• Before handoff to manufacturing (DFMEA drives the PFMEA)

Key difference from PFMEA: DFMEA analyses the design intent and design robustness. PFMEA analyses the manufacturing process. DFMEA comes first — its failure effects and severity ratings inform the PFMEA.

Prerequisites

• Product requirements / specification (engineering drawing, customer spec)
• System block diagram or product breakdown structure
• Interface matrix (if system-level analysis)
• Team: design engineer, systems engineer, quality engineer, reliability (if available)

The 7-Step AIAG-VDA 2019 Approach for DFMEA

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Step 1 — Planning and Preparation

Define scope:

• Analysis object: component, subsystem, or system
• Customer: who is the next-level assembly? Who is the end user?
• Boundary diagram: what is inside and outside the DFMEA scope
• Interface matrix: what interacts with this component (mechanical, electrical, thermal, chemical)?

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Step 2 — Structure Analysis (Design Hierarchy)

Map the product hierarchy:

System (e.g., Steering Column)
└── Subsystem (e.g., Tilt Mechanism)
    └── Component (e.g., Pivot Pin)
        └── Interface (e.g., Pin-to-Bracket contact)

Interface matrix: For each component, identify:

• Interfaces to other components (internal)
• Interfaces to the environment (external): heat, vibration, corrosion, electromagnetic
• Interfaces to the user or assembly process

Interfaces are where most design failures occur. Each interface must be analysed as a potential failure location in its own right — not just the components that share it. In practice, at least 50% of DFMEA effort should focus on interfaces and interactions; component-only analysis misses the most common field failure modes.

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Step 3 — Function Analysis

For each element in the structure, define its design function:

Format: Verb + Noun + Measurable Standard

Examples:

• Component function: "Transmit torque of 50 Nm ± 5 Nm without permanent deformation"
• Interface function: "Maintain sealing at pressure 2.5 bar across -40°C to +120°C"
• System function: "Provide steering angle feedback with latency "How would you like to receive the output?

> A — Structured Markdown (formatted tables and sections, ready to copy) > B — Plain tables (simplified structure for Excel or Word) > C — Narrative report (flowing text for a formal document or email) > > Default: A."

Adapt all output sections to the chosen format. If the platform or session context already defines a format preference, skip this question.

Reference files

• [Interface matrix construction guide](references/interface-matrix.md)

Changelog

| Version | Date | Author | Change | |---------|------|--------|--------| | 1.0 | 2026-06-01 | @RBraga01 | Initial release | | 1.1 | 2026-06-03 | @RBraga01 | Added interface matrix integration and DFMEA-to-PFMEA handoff workflow |

Source & license

This open-source skill is cataloged on AgentStack and links to its original source — we do not rehost the code.

• Author: RBraga01
• Source: RBraga01/Quality-Engineering-Skills
• License: MIT
• Homepage: https://rbraga01.github.io/Quality-Engineering-Skills

Install and usage instructions live in the source repository linked above.